#define ENABLE_RA0_PULLUP() _CN2PUE = 1
#define DISABLE_RA0_PULLUP() _CN2PUE = 0
#define ENABLE_RA1_PULLUP() _CN3PUE = 1
#define DISABLE_RA1_PULLUP() _CN3PUE = 0
#define ENABLE_RA2_PULLUP() _CN30PUE = 1
#define DISABLE_RA2_PULLUP() _CN30PUE = 0
#define ENABLE_RA3_PULLUP() _CN29PUE = 1
#define DISABLE_RA3_PULLUP() _CN29PUE = 0
#define ENABLE_RA4_PULLUP() _CN0PUE = 1
#define DISABLE_RA4_PULLUP() _CN0PUE = 0
#define ENABLE_RB0_PULLUP() _CN4PUE = 1
#define DISABLE_RB0_PULLUP() _CN4PUE = 0
#define ENABLE_RB1_PULLUP() _CN5PUE = 1
#define DISABLE_RB1_PULLUP() _CN5PUE = 0
#define ENABLE_RB2_PULLUP() _CN6PUE = 1
#define DISABLE_RB2_PULLUP() _CN6PUE = 0
#define ENABLE_RB3_PULLUP() _CN7PUE = 1
#define DISABLE_RB3_PULLUP() _CN7PUE = 0
#define ENABLE_RB4_PULLUP() _CN1PUE = 1
#define DISABLE_RB4_PULLUP() _CN1PUE = 0
#define ENABLE_RB5_PULLUP() _CN27PUE = 1
#define DISABLE_RB5_PULLUP() _CN27PUE = 0
#define ENABLE_RB6_PULLUP() _CN24PUE = 1
#define DISABLE_RB6_PULLUP() _CN24PUE = 0
#define ENABLE_RB7_PULLUP() _CN23PUE = 1
#define DISABLE_RB7_PULLUP() _CN23PUE = 0
#define ENABLE_RB8_PULLUP() _CN22PUE = 1
#define DISABLE_RB8_PULLUP() _CN22PUE = 0
#define ENABLE_RB9_PULLUP() _CN21PUE = 1
#define DISABLE_RB9_PULLUP() _CN21PUE = 0
#define ENABLE_RB10_PULLUP() _CN16PUE = 1
#define DISABLE_RB10_PULLUP() _CN16PUE = 0
#define ENABLE_RB11_PULLUP() _CN15PUE = 1
#define DISABLE_RB11_PULLUP() _CN15PUE = 0
#define ENABLE_RB12_PULLUP() _CN14PUE = 1
#define DISABLE_RB12_PULLUP() _CN14PUE = 0
#define ENABLE_RB13_PULLUP() _CN13PUE = 1
#define DISABLE_RB13_PULLUP() _CN13PUE = 0
#define ENABLE_RB14_PULLUP() _CN12PUE = 1
#define DISABLE_RB14_PULLUP() _CN12PUE = 0
#define ENABLE_RB15_PULLUP() _CN11PUE = 1
#define DISABLE_RB15_PULLUP() _CN11PUE = 0
#define ENABLE_RC0_PULLUP() _CN8PUE = 1
#define DISABLE_RC0_PULLUP() _CN8PUE = 0
#define ENABLE_RC1_PULLUP() _CN9PUE = 1
#define DISABLE_RC1_PULLUP() _CN9PUE = 0
#define ENABLE_RC2_PULLUP() _CN10PUE = 1
#define DISABLE_RC2_PULLUP() _CN10PUE = 0
#define ENABLE_RC3_PULLUP() _CN28PUE = 1
#define DISABLE_RC3_PULLUP() _CN28PUE = 0
#define ENABLE_RC4_PULLUP() _CN25PUE = 1
#define DISABLE_RC4_PULLUP() _CN25PUE = 0
#define ENABLE_RC5_PULLUP() _CN26PUE = 1
#define DISABLE_RC5_PULLUP() _CN26PUE = 0
#define ENABLE_RC6_PULLUP() _CN18PUE = 1
#define DISABLE_RC6_PULLUP() _CN18PUE = 0
#define ENABLE_RC7_PULLUP() _CN17PUE = 1
#define DISABLE_RC7_PULLUP() _CN17PUE = 0
#define ENABLE_RC8_PULLUP() _CN20PUE = 1
#define DISABLE_RC8_PULLUP() _CN20PUE = 0
#define ENABLE_RC9_PULLUP() _CN19PUE = 1
#define DISABLE_RC9_PULLUP() _CN19PUE = 0
#define ENABLE_RA0_CN_INTERRUPT() _CN2IE = 1
#define DISABLE_RA0_CN_INTERRUPT() _CN2IE = 0
#define ENABLE_RA1_CN_INTERRUPT() _CN3IE = 1
#define DISABLE_RA1_CN_INTERRUPT() _CN3IE = 0
#define ENABLE_RA2_CN_INTERRUPT() _CN30IE = 1
#define DISABLE_RA2_CN_INTERRUPT() _CN30IE = 0
#define ENABLE_RA3_CN_INTERRUPT() _CN29IE = 1
#define DISABLE_RA3_CN_INTERRUPT() _CN29IE = 0
#define ENABLE_RA4_CN_INTERRUPT() _CN0IE = 1
#define DISABLE_RA4_CN_INTERRUPT() _CN0IE = 0
#define ENABLE_RB0_CN_INTERRUPT() _CN4IE = 1
#define DISABLE_RB0_CN_INTERRUPT() _CN4IE = 0
#define ENABLE_RB1_CN_INTERRUPT() _CN5IE = 1
#define DISABLE_RB1_CN_INTERRUPT() _CN5IE = 0
#define ENABLE_RB2_CN_INTERRUPT() _CN6IE = 1
#define DISABLE_RB2_CN_INTERRUPT() _CN6IE = 0
#define ENABLE_RB3_CN_INTERRUPT() _CN7IE = 1
#define DISABLE_RB3_CN_INTERRUPT() _CN7IE = 0
#define ENABLE_RB4_CN_INTERRUPT() _CN1IE = 1
#define DISABLE_RB4_CN_INTERRUPT() _CN1IE = 0
#define ENABLE_RB5_CN_INTERRUPT() _CN27IE = 1
#define DISABLE_RB5_CN_INTERRUPT() _CN27IE = 0
#define ENABLE_RB6_CN_INTERRUPT() _CN24IE = 1
#define DISABLE_RB6_CN_INTERRUPT() _CN24IE = 0
#define ENABLE_RB7_CN_INTERRUPT() _CN23IE = 1
#define DISABLE_RB7_CN_INTERRUPT() _CN23IE = 0
#define ENABLE_RB8_CN_INTERRUPT() _CN22IE = 1
#define DISABLE_RB8_CN_INTERRUPT() _CN22IE = 0
#define ENABLE_RB9_CN_INTERRUPT() _CN21IE = 1
#define DISABLE_RB9_CN_INTERRUPT() _CN21IE = 0
#define ENABLE_RB10_CN_INTERRUPT() _CN16IE = 1
#define DISABLE_RB10_CN_INTERRUPT() _CN16IE = 0
#define ENABLE_RB11_CN_INTERRUPT() _CN15IE = 1
#define DISABLE_RB11_CN_INTERRUPT() _CN15IE = 0
#define ENABLE_RB12_CN_INTERRUPT() _CN14IE = 1
#define DISABLE_RB12_CN_INTERRUPT() _CN14IE = 0
#define ENABLE_RB13_CN_INTERRUPT() _CN13IE = 1
#define DISABLE_RB13_CN_INTERRUPT() _CN13IE = 0
#define ENABLE_RB14_CN_INTERRUPT() _CN12IE = 1
#define DISABLE_RB14_CN_INTERRUPT() _CN12IE = 0
#define ENABLE_RB15_CN_INTERRUPT() _CN11IE = 1
#define DISABLE_RB15_CN_INTERRUPT() _CN11IE = 0
#define ENABLE_RC0_CN_INTERRUPT() _CN8IE = 1
#define DISABLE_RC0_CN_INTERRUPT() _CN8IE = 0
#define ENABLE_RC1_CN_INTERRUPT() _CN9IE = 1
#define DISABLE_RC1_CN_INTERRUPT() _CN9IE = 0
#define ENABLE_RC2_CN_INTERRUPT() _CN10IE = 1
#define DISABLE_RC2_CN_INTERRUPT() _CN10IE = 0
#define ENABLE_RC3_CN_INTERRUPT() _CN28IE = 1
#define DISABLE_RC3_CN_INTERRUPT() _CN28IE = 0
#define ENABLE_RC4_CN_INTERRUPT() _CN25IE = 1
#define DISABLE_RC4_CN_INTERRUPT() _CN25IE = 0
#define ENABLE_RC5_CN_INTERRUPT() _CN26IE = 1
#define DISABLE_RC5_CN_INTERRUPT() _CN26IE = 0
#define ENABLE_RC6_CN_INTERRUPT() _CN18IE = 1
#define DISABLE_RC6_CN_INTERRUPT() _CN18IE = 0
#define ENABLE_RC7_CN_INTERRUPT() _CN17IE = 1
#define DISABLE_RC7_CN_INTERRUPT() _CN17IE = 0
#define ENABLE_RC8_CN_INTERRUPT() _CN20IE = 1
#define DISABLE_RC8_CN_INTERRUPT() _CN20IE = 0
#define ENABLE_RC9_CN_INTERRUPT() _CN19IE = 1
#define DISABLE_RC9_CN_INTERRUPT() _CN19IE = 0
#define DISABLE_RA0_ANALOG() _PCFG0 = 1
#define ENABLE_RA0_ANALOG() _PCFG0 = 0
#define DISABLE_RA1_ANALOG() _PCFG1 = 1
#define ENABLE_RA1_ANALOG() _PCFG1 = 0
#define DISABLE_RB0_ANALOG() _PCFG2 = 1
#define ENABLE_RB0_ANALOG() _PCFG2 = 0
#define DISABLE_RB1_ANALOG() _PCFG3 = 1
#define ENABLE_RB1_ANALOG() _PCFG3 = 0
#define DISABLE_RB2_ANALOG() _PCFG4 = 1
#define ENABLE_RB2_ANALOG() _PCFG4 = 0
#define DISABLE_RB3_ANALOG() _PCFG5 = 1
#define ENABLE_RB3_ANALOG() _PCFG5 = 0
#define DISABLE_RB13_ANALOG() _PCFG11 = 1
#define ENABLE_RB13_ANALOG() _PCFG11 = 0
#define DISABLE_RB14_ANALOG() _PCFG10 = 1
#define ENABLE_RB14_ANALOG() _PCFG10 = 0
#define DISABLE_RB15_ANALOG() _PCFG9 = 1
#define ENABLE_RB15_ANALOG() _PCFG9 = 0
#define DISABLE_RC0_ANALOG() _PCFG6 = 1
#define ENABLE_RC0_ANALOG() _PCFG6 = 0
#define DISABLE_RC1_ANALOG() _PCFG7 = 1
#define ENABLE_RC1_ANALOG() _PCFG7 = 0
#define DISABLE_RC2_ANALOG() _PCFG8 = 1
#define ENABLE_RC2_ANALOG() _PCFG8 = 0
#define ENABLE_RA0_OPENDRAIN() _ODCA0 = 1
#define DISABLE_RA0_OPENDRAIN() _ODCA0 = 0
#define ENABLE_RA1_OPENDRAIN() _ODCA1 = 1
#define DISABLE_RA1_OPENDRAIN() _ODCA1 = 0
#define ENABLE_RA2_OPENDRAIN() _ODCA2 = 1
#define DISABLE_RA2_OPENDRAIN() _ODCA2 = 0
#define ENABLE_RA3_OPENDRAIN() _ODCA3 = 1
#define DISABLE_RA3_OPENDRAIN() _ODCA3 = 0
#define ENABLE_RA4_OPENDRAIN() _ODCA4 = 1
#define DISABLE_RA4_OPENDRAIN() _ODCA4 = 0
#define ENABLE_RA7_OPENDRAIN() _ODCA7 = 1
#define DISABLE_RA7_OPENDRAIN() _ODCA7 = 0
#define ENABLE_RA8_OPENDRAIN() _ODCA8 = 1
#define DISABLE_RA8_OPENDRAIN() _ODCA8 = 0
#define ENABLE_RA9_OPENDRAIN() _ODCA9 = 1
#define DISABLE_RA9_OPENDRAIN() _ODCA9 = 0
#define ENABLE_RA10_OPENDRAIN() _ODCA10 = 1
#define DISABLE_RA10_OPENDRAIN() _ODCA10 = 0
#define ENABLE_RB0_OPENDRAIN() _ODCB0 = 1
#define DISABLE_RB0_OPENDRAIN() _ODCB0 = 0
#define ENABLE_RB1_OPENDRAIN() _ODCB1 = 1
#define DISABLE_RB1_OPENDRAIN() _ODCB1 = 0
#define ENABLE_RB2_OPENDRAIN() _ODCB2 = 1
#define DISABLE_RB2_OPENDRAIN() _ODCB2 = 0
#define ENABLE_RB3_OPENDRAIN() _ODCB3 = 1
#define DISABLE_RB3_OPENDRAIN() _ODCB3 = 0
#define ENABLE_RB4_OPENDRAIN() _ODCB4 = 1
#define DISABLE_RB4_OPENDRAIN() _ODCB4 = 0
#define ENABLE_RB5_OPENDRAIN() _ODCB5 = 1
#define DISABLE_RB5_OPENDRAIN() _ODCB5 = 0
#define ENABLE_RB6_OPENDRAIN() _ODCB6 = 1
#define DISABLE_RB6_OPENDRAIN() _ODCB6 = 0
#define ENABLE_RB7_OPENDRAIN() _ODCB7 = 1
#define DISABLE_RB7_OPENDRAIN() _ODCB7 = 0
#define ENABLE_RB8_OPENDRAIN() _ODCB8 = 1
#define DISABLE_RB8_OPENDRAIN() _ODCB8 = 0
#define ENABLE_RB9_OPENDRAIN() _ODCB9 = 1
#define DISABLE_RB9_OPENDRAIN() _ODCB9 = 0
#define ENABLE_RB10_OPENDRAIN() _ODCB10 = 1
#define DISABLE_RB10_OPENDRAIN() _ODCB10 = 0
#define ENABLE_RB11_OPENDRAIN() _ODCB11 = 1
#define DISABLE_RB11_OPENDRAIN() _ODCB11 = 0
#define ENABLE_RB12_OPENDRAIN() _ODCB12 = 1
#define DISABLE_RB12_OPENDRAIN() _ODCB12 = 0
#define ENABLE_RB13_OPENDRAIN() _ODCB13 = 1
#define DISABLE_RB13_OPENDRAIN() _ODCB13 = 0
#define ENABLE_RB14_OPENDRAIN() _ODCB14 = 1
#define DISABLE_RB14_OPENDRAIN() _ODCB14 = 0
#define ENABLE_RB15_OPENDRAIN() _ODCB15 = 1
#define DISABLE_RB15_OPENDRAIN() _ODCB15 = 0
#define ENABLE_RC0_OPENDRAIN() _ODCC0 = 1
#define DISABLE_RC0_OPENDRAIN() _ODCC0 = 0
#define ENABLE_RC1_OPENDRAIN() _ODCC1 = 1
#define DISABLE_RC1_OPENDRAIN() _ODCC1 = 0
#define ENABLE_RC2_OPENDRAIN() _ODCC2 = 1
#define DISABLE_RC2_OPENDRAIN() _ODCC2 = 0
#define ENABLE_RC3_OPENDRAIN() _ODCC3 = 1
#define DISABLE_RC3_OPENDRAIN() _ODCC3 = 0
#define ENABLE_RC4_OPENDRAIN() _ODCC4 = 1
#define DISABLE_RC4_OPENDRAIN() _ODCC4 = 0
#define ENABLE_RC5_OPENDRAIN() _ODCC5 = 1
#define DISABLE_RC5_OPENDRAIN() _ODCC5 = 0
#define ENABLE_RC6_OPENDRAIN() _ODCC6 = 1
#define DISABLE_RC6_OPENDRAIN() _ODCC6 = 0
#define ENABLE_RC7_OPENDRAIN() _ODCC7 = 1
#define DISABLE_RC7_OPENDRAIN() _ODCC7 = 0
#define ENABLE_RC8_OPENDRAIN() _ODCC8 = 1
#define DISABLE_RC8_OPENDRAIN() _ODCC8 = 0
#define ENABLE_RC9_OPENDRAIN() _ODCC9 = 1
#define DISABLE_RC9_OPENDRAIN() _ODCC9 = 0
static inline void CONFIG_RA0_AS_DIG_OUTPUT() {
  DISABLE_RA0_PULLUP();
  DISABLE_RA0_OPENDRAIN();
  _TRISA0 = 0;
  _PCFG0 = 1;
}
static inline void CONFIG_RA1_AS_DIG_OUTPUT() {
  DISABLE_RA1_PULLUP();
  DISABLE_RA1_OPENDRAIN();
  _TRISA1 = 0;
  _PCFG1 = 1;
}
static inline void CONFIG_RA2_AS_DIG_OUTPUT() {
  DISABLE_RA2_PULLUP();
  DISABLE_RA2_OPENDRAIN();
  _TRISA2 = 0;
}
static inline void CONFIG_RA3_AS_DIG_OUTPUT() {
  DISABLE_RA3_PULLUP();
  DISABLE_RA3_OPENDRAIN();
  _TRISA3 = 0;
}
static inline void CONFIG_RA4_AS_DIG_OUTPUT() {
  DISABLE_RA4_PULLUP();
  DISABLE_RA4_OPENDRAIN();
  _TRISA4 = 0;
}
static inline void CONFIG_RA7_AS_DIG_OUTPUT() {
  DISABLE_RA7_OPENDRAIN();
  _TRISA7 = 0;
}
static inline void CONFIG_RA8_AS_DIG_OUTPUT() {
  DISABLE_RA8_OPENDRAIN();
  _TRISA8 = 0;
}
static inline void CONFIG_RA9_AS_DIG_OUTPUT() {
  DISABLE_RA9_OPENDRAIN();
  _TRISA9 = 0;
}
static inline void CONFIG_RA10_AS_DIG_OUTPUT() {
  DISABLE_RA10_OPENDRAIN();
  _TRISA10 = 0;
}
static inline void CONFIG_RB0_AS_DIG_OUTPUT() {
  DISABLE_RB0_PULLUP();
  DISABLE_RB0_OPENDRAIN();
  _TRISB0 = 0;
  _PCFG2 = 1;
}
static inline void CONFIG_RB1_AS_DIG_OUTPUT() {
  DISABLE_RB1_PULLUP();
  DISABLE_RB1_OPENDRAIN();
  _TRISB1 = 0;
  _PCFG3 = 1;
}
static inline void CONFIG_RB2_AS_DIG_OUTPUT() {
  DISABLE_RB2_PULLUP();
  DISABLE_RB2_OPENDRAIN();
  _TRISB2 = 0;
  _PCFG4 = 1;
}
static inline void CONFIG_RB3_AS_DIG_OUTPUT() {
  DISABLE_RB3_PULLUP();
  DISABLE_RB3_OPENDRAIN();
  _TRISB3 = 0;
  _PCFG5 = 1;
}
static inline void CONFIG_RB4_AS_DIG_OUTPUT() {
  DISABLE_RB4_PULLUP();
  DISABLE_RB4_OPENDRAIN();
  _TRISB4 = 0;
}
static inline void CONFIG_RB5_AS_DIG_OUTPUT() {
  DISABLE_RB5_PULLUP();
  DISABLE_RB5_OPENDRAIN();
  _TRISB5 = 0;
}
static inline void CONFIG_RB6_AS_DIG_OUTPUT() {
  DISABLE_RB6_PULLUP();
  DISABLE_RB6_OPENDRAIN();
  _TRISB6 = 0;
}
static inline void CONFIG_RB7_AS_DIG_OUTPUT() {
  DISABLE_RB7_PULLUP();
  DISABLE_RB7_OPENDRAIN();
  _TRISB7 = 0;
}
static inline void CONFIG_RB8_AS_DIG_OUTPUT() {
  DISABLE_RB8_PULLUP();
  DISABLE_RB8_OPENDRAIN();
  _TRISB8 = 0;
}
static inline void CONFIG_RB9_AS_DIG_OUTPUT() {
  DISABLE_RB9_PULLUP();
  DISABLE_RB9_OPENDRAIN();
  _TRISB9 = 0;
}
static inline void CONFIG_RB10_AS_DIG_OUTPUT() {
  DISABLE_RB10_PULLUP();
  DISABLE_RB10_OPENDRAIN();
  _TRISB10 = 0;
}
static inline void CONFIG_RB11_AS_DIG_OUTPUT() {
  DISABLE_RB11_PULLUP();
  DISABLE_RB11_OPENDRAIN();
  _TRISB11 = 0;
}
static inline void CONFIG_RB12_AS_DIG_OUTPUT() {
  DISABLE_RB12_PULLUP();
  DISABLE_RB12_OPENDRAIN();
  _TRISB12 = 0;
}
static inline void CONFIG_RB13_AS_DIG_OUTPUT() {
  DISABLE_RB13_PULLUP();
  DISABLE_RB13_OPENDRAIN();
  _TRISB13 = 0;
  _PCFG11 = 1;
}
static inline void CONFIG_RB14_AS_DIG_OUTPUT() {
  DISABLE_RB14_PULLUP();
  DISABLE_RB14_OPENDRAIN();
  _TRISB14 = 0;
  _PCFG10 = 1;
}
static inline void CONFIG_RB15_AS_DIG_OUTPUT() {
  DISABLE_RB15_PULLUP();
  DISABLE_RB15_OPENDRAIN();
  _TRISB15 = 0;
  _PCFG9 = 1;
}
static inline void CONFIG_RC0_AS_DIG_OUTPUT() {
  DISABLE_RC0_PULLUP();
  DISABLE_RC0_OPENDRAIN();
  _TRISC0 = 0;
  _PCFG6 = 1;
}
static inline void CONFIG_RC1_AS_DIG_OUTPUT() {
  DISABLE_RC1_PULLUP();
  DISABLE_RC1_OPENDRAIN();
  _TRISC1 = 0;
  _PCFG7 = 1;
}
static inline void CONFIG_RC2_AS_DIG_OUTPUT() {
  DISABLE_RC2_PULLUP();
  DISABLE_RC2_OPENDRAIN();
  _TRISC2 = 0;
  _PCFG8 = 1;
}
static inline void CONFIG_RC3_AS_DIG_OUTPUT() {
  DISABLE_RC3_PULLUP();
  DISABLE_RC3_OPENDRAIN();
  _TRISC3 = 0;
}
static inline void CONFIG_RC4_AS_DIG_OUTPUT() {
  DISABLE_RC4_PULLUP();
  DISABLE_RC4_OPENDRAIN();
  _TRISC4 = 0;
}
static inline void CONFIG_RC5_AS_DIG_OUTPUT() {
  DISABLE_RC5_PULLUP();
  DISABLE_RC5_OPENDRAIN();
  _TRISC5 = 0;
}
static inline void CONFIG_RC6_AS_DIG_OUTPUT() {
  DISABLE_RC6_PULLUP();
  DISABLE_RC6_OPENDRAIN();
  _TRISC6 = 0;
}
static inline void CONFIG_RC7_AS_DIG_OUTPUT() {
  DISABLE_RC7_PULLUP();
  DISABLE_RC7_OPENDRAIN();
  _TRISC7 = 0;
}
static inline void CONFIG_RC8_AS_DIG_OUTPUT() {
  DISABLE_RC8_PULLUP();
  DISABLE_RC8_OPENDRAIN();
  _TRISC8 = 0;
}
static inline void CONFIG_RC9_AS_DIG_OUTPUT() {
  DISABLE_RC9_PULLUP();
  DISABLE_RC9_OPENDRAIN();
  _TRISC9 = 0;
}
static inline void CONFIG_RA0_AS_DIG_OD_OUTPUT() {
  DISABLE_RA0_PULLUP();
  ENABLE_RA0_OPENDRAIN();
  _TRISA0 = 0;
  _PCFG0 = 1;
}
static inline void CONFIG_RA1_AS_DIG_OD_OUTPUT() {
  DISABLE_RA1_PULLUP();
  ENABLE_RA1_OPENDRAIN();
  _TRISA1 = 0;
  _PCFG1 = 1;
}
static inline void CONFIG_RA2_AS_DIG_OD_OUTPUT() {
  DISABLE_RA2_PULLUP();
  ENABLE_RA2_OPENDRAIN();
  _TRISA2 = 0;
}
static inline void CONFIG_RA3_AS_DIG_OD_OUTPUT() {
  DISABLE_RA3_PULLUP();
  ENABLE_RA3_OPENDRAIN();
  _TRISA3 = 0;
}
static inline void CONFIG_RA4_AS_DIG_OD_OUTPUT() {
  DISABLE_RA4_PULLUP();
  ENABLE_RA4_OPENDRAIN();
  _TRISA4 = 0;
}
static inline void CONFIG_RA7_AS_DIG_OD_OUTPUT() {
  ENABLE_RA7_OPENDRAIN();
  _TRISA7 = 0;
}
static inline void CONFIG_RA8_AS_DIG_OD_OUTPUT() {
  ENABLE_RA8_OPENDRAIN();
  _TRISA8 = 0;
}
static inline void CONFIG_RA9_AS_DIG_OD_OUTPUT() {
  ENABLE_RA9_OPENDRAIN();
  _TRISA9 = 0;
}
static inline void CONFIG_RA10_AS_DIG_OD_OUTPUT() {
  ENABLE_RA10_OPENDRAIN();
  _TRISA10 = 0;
}
static inline void CONFIG_RB0_AS_DIG_OD_OUTPUT() {
  DISABLE_RB0_PULLUP();
  ENABLE_RB0_OPENDRAIN();
  _TRISB0 = 0;
  _PCFG2 = 1;
}
static inline void CONFIG_RB1_AS_DIG_OD_OUTPUT() {
  DISABLE_RB1_PULLUP();
  ENABLE_RB1_OPENDRAIN();
  _TRISB1 = 0;
  _PCFG3 = 1;
}
static inline void CONFIG_RB2_AS_DIG_OD_OUTPUT() {
  DISABLE_RB2_PULLUP();
  ENABLE_RB2_OPENDRAIN();
  _TRISB2 = 0;
  _PCFG4 = 1;
}
static inline void CONFIG_RB3_AS_DIG_OD_OUTPUT() {
  DISABLE_RB3_PULLUP();
  ENABLE_RB3_OPENDRAIN();
  _TRISB3 = 0;
  _PCFG5 = 1;
}
static inline void CONFIG_RB4_AS_DIG_OD_OUTPUT() {
  DISABLE_RB4_PULLUP();
  ENABLE_RB4_OPENDRAIN();
  _TRISB4 = 0;
}
static inline void CONFIG_RB5_AS_DIG_OD_OUTPUT() {
  DISABLE_RB5_PULLUP();
  ENABLE_RB5_OPENDRAIN();
  _TRISB5 = 0;
}
static inline void CONFIG_RB6_AS_DIG_OD_OUTPUT() {
  DISABLE_RB6_PULLUP();
  ENABLE_RB6_OPENDRAIN();
  _TRISB6 = 0;
}
static inline void CONFIG_RB7_AS_DIG_OD_OUTPUT() {
  DISABLE_RB7_PULLUP();
  ENABLE_RB7_OPENDRAIN();
  _TRISB7 = 0;
}
static inline void CONFIG_RB8_AS_DIG_OD_OUTPUT() {
  DISABLE_RB8_PULLUP();
  ENABLE_RB8_OPENDRAIN();
  _TRISB8 = 0;
}
static inline void CONFIG_RB9_AS_DIG_OD_OUTPUT() {
  DISABLE_RB9_PULLUP();
  ENABLE_RB9_OPENDRAIN();
  _TRISB9 = 0;
}
static inline void CONFIG_RB10_AS_DIG_OD_OUTPUT() {
  DISABLE_RB10_PULLUP();
  ENABLE_RB10_OPENDRAIN();
  _TRISB10 = 0;
}
static inline void CONFIG_RB11_AS_DIG_OD_OUTPUT() {
  DISABLE_RB11_PULLUP();
  ENABLE_RB11_OPENDRAIN();
  _TRISB11 = 0;
}
static inline void CONFIG_RB12_AS_DIG_OD_OUTPUT() {
  DISABLE_RB12_PULLUP();
  ENABLE_RB12_OPENDRAIN();
  _TRISB12 = 0;
}
static inline void CONFIG_RB13_AS_DIG_OD_OUTPUT() {
  DISABLE_RB13_PULLUP();
  ENABLE_RB13_OPENDRAIN();
  _TRISB13 = 0;
  _PCFG11 = 1;
}
static inline void CONFIG_RB14_AS_DIG_OD_OUTPUT() {
  DISABLE_RB14_PULLUP();
  ENABLE_RB14_OPENDRAIN();
  _TRISB14 = 0;
  _PCFG10 = 1;
}
static inline void CONFIG_RB15_AS_DIG_OD_OUTPUT() {
  DISABLE_RB15_PULLUP();
  ENABLE_RB15_OPENDRAIN();
  _TRISB15 = 0;
  _PCFG9 = 1;
}
static inline void CONFIG_RC0_AS_DIG_OD_OUTPUT() {
  DISABLE_RC0_PULLUP();
  ENABLE_RC0_OPENDRAIN();
  _TRISC0 = 0;
  _PCFG6 = 1;
}
static inline void CONFIG_RC1_AS_DIG_OD_OUTPUT() {
  DISABLE_RC1_PULLUP();
  ENABLE_RC1_OPENDRAIN();
  _TRISC1 = 0;
  _PCFG7 = 1;
}
static inline void CONFIG_RC2_AS_DIG_OD_OUTPUT() {
  DISABLE_RC2_PULLUP();
  ENABLE_RC2_OPENDRAIN();
  _TRISC2 = 0;
  _PCFG8 = 1;
}
static inline void CONFIG_RC3_AS_DIG_OD_OUTPUT() {
  DISABLE_RC3_PULLUP();
  ENABLE_RC3_OPENDRAIN();
  _TRISC3 = 0;
}
static inline void CONFIG_RC4_AS_DIG_OD_OUTPUT() {
  DISABLE_RC4_PULLUP();
  ENABLE_RC4_OPENDRAIN();
  _TRISC4 = 0;
}
static inline void CONFIG_RC5_AS_DIG_OD_OUTPUT() {
  DISABLE_RC5_PULLUP();
  ENABLE_RC5_OPENDRAIN();
  _TRISC5 = 0;
}
static inline void CONFIG_RC6_AS_DIG_OD_OUTPUT() {
  DISABLE_RC6_PULLUP();
  ENABLE_RC6_OPENDRAIN();
  _TRISC6 = 0;
}
static inline void CONFIG_RC7_AS_DIG_OD_OUTPUT() {
  DISABLE_RC7_PULLUP();
  ENABLE_RC7_OPENDRAIN();
  _TRISC7 = 0;
}
static inline void CONFIG_RC8_AS_DIG_OD_OUTPUT() {
  DISABLE_RC8_PULLUP();
  ENABLE_RC8_OPENDRAIN();
  _TRISC8 = 0;
}
static inline void CONFIG_RC9_AS_DIG_OD_OUTPUT() {
  DISABLE_RC9_PULLUP();
  ENABLE_RC9_OPENDRAIN();
  _TRISC9 = 0;
}
static inline void CONFIG_RA0_AS_DIG_INPUT() {
  DISABLE_RA0_PULLUP();
  _TRISA0 = 1;
  _PCFG0 = 1;
}
static inline void CONFIG_RA1_AS_DIG_INPUT() {
  DISABLE_RA1_PULLUP();
  _TRISA1 = 1;
  _PCFG1 = 1;
}
static inline void CONFIG_RA2_AS_DIG_INPUT() {
  DISABLE_RA2_PULLUP();
  _TRISA2 = 1;
}
static inline void CONFIG_RA3_AS_DIG_INPUT() {
  DISABLE_RA3_PULLUP();
  _TRISA3 = 1;
}
static inline void CONFIG_RA4_AS_DIG_INPUT() {
  DISABLE_RA4_PULLUP();
  _TRISA4 = 1;
}
static inline void CONFIG_RA7_AS_DIG_INPUT() {
  _TRISA7 = 1;
}
static inline void CONFIG_RA8_AS_DIG_INPUT() {
  _TRISA8 = 1;
}
static inline void CONFIG_RA9_AS_DIG_INPUT() {
  _TRISA9 = 1;
}
static inline void CONFIG_RA10_AS_DIG_INPUT() {
  _TRISA10 = 1;
}
static inline void CONFIG_RB0_AS_DIG_INPUT() {
  DISABLE_RB0_PULLUP();
  _TRISB0 = 1;
  _PCFG2 = 1;
}
static inline void CONFIG_RB1_AS_DIG_INPUT() {
  DISABLE_RB1_PULLUP();
  _TRISB1 = 1;
  _PCFG3 = 1;
}
static inline void CONFIG_RB2_AS_DIG_INPUT() {
  DISABLE_RB2_PULLUP();
  _TRISB2 = 1;
  _PCFG4 = 1;
}
static inline void CONFIG_RB3_AS_DIG_INPUT() {
  DISABLE_RB3_PULLUP();
  _TRISB3 = 1;
  _PCFG5 = 1;
}
static inline void CONFIG_RB4_AS_DIG_INPUT() {
  DISABLE_RB4_PULLUP();
  _TRISB4 = 1;
}
static inline void CONFIG_RB5_AS_DIG_INPUT() {
  DISABLE_RB5_PULLUP();
  _TRISB5 = 1;
}
static inline void CONFIG_RB6_AS_DIG_INPUT() {
  DISABLE_RB6_PULLUP();
  _TRISB6 = 1;
}
static inline void CONFIG_RB7_AS_DIG_INPUT() {
  DISABLE_RB7_PULLUP();
  _TRISB7 = 1;
}
static inline void CONFIG_RB8_AS_DIG_INPUT() {
  DISABLE_RB8_PULLUP();
  _TRISB8 = 1;
}
static inline void CONFIG_RB9_AS_DIG_INPUT() {
  DISABLE_RB9_PULLUP();
  _TRISB9 = 1;
}
static inline void CONFIG_RB10_AS_DIG_INPUT() {
  DISABLE_RB10_PULLUP();
  _TRISB10 = 1;
}
static inline void CONFIG_RB11_AS_DIG_INPUT() {
  DISABLE_RB11_PULLUP();
  _TRISB11 = 1;
}
static inline void CONFIG_RB12_AS_DIG_INPUT() {
  DISABLE_RB12_PULLUP();
  _TRISB12 = 1;
}
static inline void CONFIG_RB13_AS_DIG_INPUT() {
  DISABLE_RB13_PULLUP();
  _TRISB13 = 1;
  _PCFG11 = 1;
}
static inline void CONFIG_RB14_AS_DIG_INPUT() {
  DISABLE_RB14_PULLUP();
  _TRISB14 = 1;
  _PCFG10 = 1;
}
static inline void CONFIG_RB15_AS_DIG_INPUT() {
  DISABLE_RB15_PULLUP();
  _TRISB15 = 1;
  _PCFG9 = 1;
}
static inline void CONFIG_RC0_AS_DIG_INPUT() {
  DISABLE_RC0_PULLUP();
  _TRISC0 = 1;
  _PCFG6 = 1;
}
static inline void CONFIG_RC1_AS_DIG_INPUT() {
  DISABLE_RC1_PULLUP();
  _TRISC1 = 1;
  _PCFG7 = 1;
}
static inline void CONFIG_RC2_AS_DIG_INPUT() {
  DISABLE_RC2_PULLUP();
  _TRISC2 = 1;
  _PCFG8 = 1;
}
static inline void CONFIG_RC3_AS_DIG_INPUT() {
  DISABLE_RC3_PULLUP();
  _TRISC3 = 1;
}
static inline void CONFIG_RC4_AS_DIG_INPUT() {
  DISABLE_RC4_PULLUP();
  _TRISC4 = 1;
}
static inline void CONFIG_RC5_AS_DIG_INPUT() {
  DISABLE_RC5_PULLUP();
  _TRISC5 = 1;
}
static inline void CONFIG_RC6_AS_DIG_INPUT() {
  DISABLE_RC6_PULLUP();
  _TRISC6 = 1;
}
static inline void CONFIG_RC7_AS_DIG_INPUT() {
  DISABLE_RC7_PULLUP();
  _TRISC7 = 1;
}
static inline void CONFIG_RC8_AS_DIG_INPUT() {
  DISABLE_RC8_PULLUP();
  _TRISC8 = 1;
}
static inline void CONFIG_RC9_AS_DIG_INPUT() {
  DISABLE_RC9_PULLUP();
  _TRISC9 = 1;
}
#define CONFIG_RP0_AS_DIG_PIN()  _PCFG2 = 1
#define CONFIG_RP1_AS_DIG_PIN()  _PCFG3 = 1
#define CONFIG_RP2_AS_DIG_PIN()  _PCFG4 = 1
#define CONFIG_RP3_AS_DIG_PIN()  _PCFG5 = 1
#define CONFIG_RP4_AS_DIG_PIN()
#define CONFIG_RP5_AS_DIG_PIN()
#define CONFIG_RP6_AS_DIG_PIN()
#define CONFIG_RP7_AS_DIG_PIN()
#define CONFIG_RP8_AS_DIG_PIN()
#define CONFIG_RP9_AS_DIG_PIN()
#define CONFIG_RP10_AS_DIG_PIN()
#define CONFIG_RP11_AS_DIG_PIN()
#define CONFIG_RP12_AS_DIG_PIN()
#define CONFIG_RP13_AS_DIG_PIN()  _PCFG11 = 1
#define CONFIG_RP14_AS_DIG_PIN()  _PCFG10 = 1
#define CONFIG_RP15_AS_DIG_PIN()  _PCFG9 = 1
#define CONFIG_RP16_AS_DIG_PIN()  _PCFG6 = 1
#define CONFIG_RP17_AS_DIG_PIN()  _PCFG7 = 1
#define CONFIG_RP18_AS_DIG_PIN()  _PCFG8 = 1
#define CONFIG_RP19_AS_DIG_PIN()
#define CONFIG_RP20_AS_DIG_PIN()
#define CONFIG_RP21_AS_DIG_PIN()
#define CONFIG_RP22_AS_DIG_PIN()
#define CONFIG_RP23_AS_DIG_PIN()
#define CONFIG_RP24_AS_DIG_PIN()
#define CONFIG_RP25_AS_DIG_PIN()
#define CONFIG_RP26_AS_DIG_PIN()
#define CONFIG_RP27_AS_DIG_PIN()
#define CONFIG_RP28_AS_DIG_PIN()
#define CONFIG_RP29_AS_DIG_PIN()
#define CONFIG_RP30_AS_DIG_PIN()
#define CONFIG_RP31_AS_DIG_PIN()
#define CONFIG_RP32_AS_DIG_PIN()
#define CONFIG_RP33_AS_DIG_PIN()
#define CONFIG_RP34_AS_DIG_PIN()
#define CONFIG_RP35_AS_DIG_PIN()
#define CONFIG_RP36_AS_DIG_PIN()
#define CONFIG_RP37_AS_DIG_PIN()
#define CONFIG_RP38_AS_DIG_PIN()
#define CONFIG_RP39_AS_DIG_PIN()
#define CONFIG_RP40_AS_DIG_PIN()
#define CONFIG_RP41_AS_DIG_PIN()
#define CONFIG_RP42_AS_DIG_PIN()
#define CONFIG_RP43_AS_DIG_PIN()
#define CONFIG_RP44_AS_DIG_PIN()
#define CONFIG_RP45_AS_DIG_PIN()
#ifdef _PCFG0
static inline void CONFIG_AN0_AS_ANALOG() {
  CONFIG_RA0_AS_DIG_INPUT();
  _PCFG0 = 0;
}
static inline void CONFIG_AN0_AS_DIGITAL() {
  _PCFG0 = 1;
}
#endif
#ifdef _PCFG1
static inline void CONFIG_AN1_AS_ANALOG() {
  CONFIG_RA1_AS_DIG_INPUT();
  _PCFG1 = 0;
}
static inline void CONFIG_AN1_AS_DIGITAL() {
  _PCFG1 = 1;
}
#endif
#ifdef _PCFG2
static inline void CONFIG_AN2_AS_ANALOG() {
  CONFIG_RB0_AS_DIG_INPUT();
  _PCFG2 = 0;
}
static inline void CONFIG_AN2_AS_DIGITAL() {
  _PCFG2 = 1;
}
#endif
#ifdef _PCFG3
static inline void CONFIG_AN3_AS_ANALOG() {
  CONFIG_RB1_AS_DIG_INPUT();
  _PCFG3 = 0;
}
static inline void CONFIG_AN3_AS_DIGITAL() {
  _PCFG3 = 1;
}
#endif
#ifdef _PCFG4
static inline void CONFIG_AN4_AS_ANALOG() {
  CONFIG_RB2_AS_DIG_INPUT();
  _PCFG4 = 0;
}
static inline void CONFIG_AN4_AS_DIGITAL() {
  _PCFG4 = 1;
}
#endif
#ifdef _PCFG5
static inline void CONFIG_AN5_AS_ANALOG() {
  CONFIG_RB3_AS_DIG_INPUT();
  _PCFG5 = 0;
}
static inline void CONFIG_AN5_AS_DIGITAL() {
  _PCFG5 = 1;
}
#endif
#ifdef _PCFG6
static inline void CONFIG_AN6_AS_ANALOG() {
  CONFIG_RC0_AS_DIG_INPUT();
  _PCFG6 = 0;
}
static inline void CONFIG_AN6_AS_DIGITAL() {
  _PCFG6 = 1;
}
#endif
#ifdef _PCFG7
static inline void CONFIG_AN7_AS_ANALOG() {
  CONFIG_RC1_AS_DIG_INPUT();
  _PCFG7 = 0;
}
static inline void CONFIG_AN7_AS_DIGITAL() {
  _PCFG7 = 1;
}
#endif
#ifdef _PCFG8
static inline void CONFIG_AN8_AS_ANALOG() {
  CONFIG_RC2_AS_DIG_INPUT();
  _PCFG8 = 0;
}
static inline void CONFIG_AN8_AS_DIGITAL() {
  _PCFG8 = 1;
}
#endif
#ifdef _PCFG9
static inline void CONFIG_AN9_AS_ANALOG() {
  CONFIG_RB15_AS_DIG_INPUT();
  _PCFG9 = 0;
}
static inline void CONFIG_AN9_AS_DIGITAL() {
  _PCFG9 = 1;
}
#endif
#ifdef _PCFG10
static inline void CONFIG_AN10_AS_ANALOG() {
  CONFIG_RB14_AS_DIG_INPUT();
  _PCFG10 = 0;
}
static inline void CONFIG_AN10_AS_DIGITAL() {
  _PCFG10 = 1;
}
#endif
#ifdef _PCFG11
static inline void CONFIG_AN11_AS_ANALOG() {
  CONFIG_RB13_AS_DIG_INPUT();
  _PCFG11 = 0;
}
static inline void CONFIG_AN11_AS_DIGITAL() {
  _PCFG11 = 1;
}
#endif
#ifdef _PCFG12
static inline void CONFIG_AN12_AS_ANALOG() {
  _PCFG12 = 0;
}
static inline void CONFIG_AN12_AS_DIGITAL() {
  _PCFG12 = 1;
}
#endif
#ifdef _PCFG13
static inline void CONFIG_AN13_AS_ANALOG() {
  _PCFG13 = 0;
}
static inline void CONFIG_AN13_AS_DIGITAL() {
  _PCFG13 = 1;
}
#endif
#ifdef _PCFG14
static inline void CONFIG_AN14_AS_ANALOG() {
  _PCFG14 = 0;
}
static inline void CONFIG_AN14_AS_DIGITAL() {
  _PCFG14 = 1;
}
#endif
#ifdef _PCFG15
static inline void CONFIG_AN15_AS_ANALOG() {
  _PCFG15 = 0;
}
static inline void CONFIG_AN15_AS_DIGITAL() {
  _PCFG15 = 1;
}
#endif
#ifdef _PCFG16
static inline void CONFIG_AN16_AS_ANALOG() {
  _PCFG16 = 0;
}
static inline void CONFIG_AN16_AS_DIGITAL() {
  _PCFG16 = 1;
}
#endif
#ifdef _PCFG17
static inline void CONFIG_AN17_AS_ANALOG() {
  _PCFG17 = 0;
}
static inline void CONFIG_AN17_AS_DIGITAL() {
  _PCFG17 = 1;
}
#endif
#ifdef _PCFG18
static inline void CONFIG_AN18_AS_ANALOG() {
  _PCFG18 = 0;
}
static inline void CONFIG_AN18_AS_DIGITAL() {
  _PCFG18 = 1;
}
#endif
#ifdef _PCFG19
static inline void CONFIG_AN19_AS_ANALOG() {
  _PCFG19 = 0;
}
static inline void CONFIG_AN19_AS_DIGITAL() {
  _PCFG19 = 1;
}
#endif
#ifdef _PCFG20
static inline void CONFIG_AN20_AS_ANALOG() {
  _PCFG20 = 0;
}
static inline void CONFIG_AN20_AS_DIGITAL() {
  _PCFG20 = 1;
}
#endif
#ifdef _PCFG21
static inline void CONFIG_AN21_AS_ANALOG() {
  _PCFG21 = 0;
}
static inline void CONFIG_AN21_AS_DIGITAL() {
  _PCFG21 = 1;
}
#endif
#ifdef _PCFG22
static inline void CONFIG_AN22_AS_ANALOG() {
  _PCFG22 = 0;
}
static inline void CONFIG_AN22_AS_DIGITAL() {
  _PCFG22 = 1;
}
#endif
#ifdef _PCFG23
static inline void CONFIG_AN23_AS_ANALOG() {
  _PCFG23 = 0;
}
static inline void CONFIG_AN23_AS_DIGITAL() {
  _PCFG23 = 1;
}
#endif
#ifdef _PCFG24
static inline void CONFIG_AN24_AS_ANALOG() {
  _PCFG24 = 0;
}
static inline void CONFIG_AN24_AS_DIGITAL() {
  _PCFG24 = 1;
}
#endif
#ifdef _PCFG25
static inline void CONFIG_AN25_AS_ANALOG() {
  _PCFG25 = 0;
}
static inline void CONFIG_AN25_AS_DIGITAL() {
  _PCFG25 = 1;
}
#endif
#ifdef _PCFG26
static inline void CONFIG_AN26_AS_ANALOG() {
  _PCFG26 = 0;
}
static inline void CONFIG_AN26_AS_DIGITAL() {
  _PCFG26 = 1;
}
#endif
#ifdef _PCFG27
static inline void CONFIG_AN27_AS_ANALOG() {
  _PCFG27 = 0;
}
static inline void CONFIG_AN27_AS_DIGITAL() {
  _PCFG27 = 1;
}
#endif
#ifdef _PCFG28
static inline void CONFIG_AN28_AS_ANALOG() {
  _PCFG28 = 0;
}
static inline void CONFIG_AN28_AS_DIGITAL() {
  _PCFG28 = 1;
}
#endif
#ifdef _PCFG29
static inline void CONFIG_AN29_AS_ANALOG() {
  _PCFG29 = 0;
}
static inline void CONFIG_AN29_AS_DIGITAL() {
  _PCFG29 = 1;
}
#endif
#ifdef _PCFG30
static inline void CONFIG_AN30_AS_ANALOG() {
  _PCFG30 = 0;
}
static inline void CONFIG_AN30_AS_DIGITAL() {
  _PCFG30 = 1;
}
#endif
#ifdef _PCFG31
static inline void CONFIG_AN31_AS_ANALOG() {
  _PCFG31 = 0;
}
static inline void CONFIG_AN31_AS_DIGITAL() {
  _PCFG31 = 1;
}
#endif
#define DISABLE_C2IND_ANALOG()
#define DISABLE_U2CTS_ANALOG()
#define DISABLE_CTPLS_ANALOG()
#define DISABLE_U4TX_ANALOG()
#define DISABLE_SS2_ANALOG()
#define DISABLE_U3TX_ANALOG()
#define DISABLE_C1OUT_ANALOG()
#define DISABLE_INT1_ANALOG()
#define DISABLE_U1RTS_ANALOG()
#define DISABLE_T5CK_ANALOG()
#define DISABLE_C1IND_ANALOG()
#define DISABLE_U3CTS_ANALOG()
#define DISABLE_OC5_ANALOG()
#define DISABLE_U2TX_ANALOG()
#define DISABLE_C2INA_ANALOG()
#define DISABLE_INT0_ANALOG()
#define DISABLE_U1BCLK_ANALOG()
#define DISABLE_SS1_ANALOG()
#define DISABLE_IC4_ANALOG()
#define DISABLE_OCFB_ANALOG()
#define DISABLE_C1TX_ANALOG()
#define DISABLE_RTCC_ANALOG()
#define DISABLE_IC3_ANALOG()
#define DISABLE_T3CK_ANALOG()
#define DISABLE_C2OUT_ANALOG()
#define DISABLE_INT2_ANALOG()
#define DISABLE_OCFA_ANALOG()
#define DISABLE_OC4_ANALOG()
#define DISABLE_U1RX_ANALOG()
#define DISABLE_IC8_ANALOG()
#define DISABLE_U3RX_ANALOG()
#define DISABLE_CTED2_ANALOG()
#define DISABLE_IC1_ANALOG()
#define DISABLE_U2BCLK_ANALOG()
#define DISABLE_C1INA_ANALOG()
#define DISABLE_T4CK_ANALOG()
#define DISABLE_C2INC_ANALOG()
#define DISABLE_IC7_ANALOG()
#define DISABLE_IC2_ANALOG()
#define DISABLE_U2RTS_ANALOG()
#define DISABLE_U4RTS_ANALOG()
#define DISABLE_SDI2_ANALOG()
#define DISABLE_OC2_ANALOG()
#define DISABLE_C1RX_ANALOG()
#define DISABLE_C2RX_ANALOG()
#define DISABLE_SDO1_ANALOG()
#define DISABLE_U1CTS_ANALOG()
#define DISABLE_OC3_ANALOG()
#define DISABLE_C21INB_ANALOG()
#define DISABLE_U1TX_ANALOG()
#define DISABLE_T1CK_ANALOG()
#define DISABLE_SCK1_ANALOG()
#define DISABLE_U2RX_ANALOG()
#define DISABLE_T2CK_ANALOG()
#define DISABLE_CTED1_ANALOG()
#define DISABLE_U3RTS_ANALOG()
#define DISABLE_SDO2_ANALOG()
#define DISABLE_C1INC_ANALOG()
#define DISABLE_U4RX_ANALOG()
#define DISABLE_IC5_ANALOG()
#define DISABLE_SDI1_ANALOG()
#define DISABLE_C1INB_ANALOG()
#define DISABLE_OC1_ANALOG()
#define DISABLE_SCK2_ANALOG()
#define DISABLE_IC6_ANALOG()
#define DISABLE_U4CTS_ANALOG()
#define _PIC24_DIGIO_DEFINED
